Semiconductor chip packages which include one or more semiconductor chips mounted on a circuitized surface of a ceramic, e.g. , alumina, substrate are known in the art. Typically, such a semiconductor chip package, conventionally termed a ceramic chip carrier, is mounted on a printed circuit card (or board). If surface mounting is to be used, the ceramic chip carrier may include a lead frame which is mechanically and electrically connected to electrical contact pads formed around the periphery of the chip-bearing, circuitized surface of the ceramic substrate.
Ceramic chip carriers of the type referred to above may include single-layer and multi-layer ceramic substrates. In the former case, the chip carrier is fabricated by initially circuitizing an upper surface of the single ceramic layer using conventional thick film metal screening techniques. The metal employed is, for example, an alloy of silver (Ag) and palladium (Pd), which has a melting temperature of 1145 degrees C., and an electrical resistivity of 20.times.10.sup.-8 ohm-meters. The resulting circuit lines typically have thicknesses and widths of, for example, 0.5 mils and 3 mils, respectively. After circuitization, the resulting ceramic layer is fired in air at a temperature of, for example, 850-950 degrees C., which is readily withstood by the Ag-Pd alloy. A semiconductor chip or chips is then mounted on the circuitized surface using conventional wire bonding techniques.
In the fabrication of a multi-layer ceramic substrate, each ceramic layer is usually circuitized using conventional thick film screening techniques, and these circuitized ceramic layers are then cured and laminated together at firing temperatures of, for example, 1900 degrees C. To withstand these high temperatures, the circuitry on each of the circuitized layers typically comprises a refractory metal such as molybdenum (Mo) or tungsten (W), which have melting temperatures equal to or greater than 2625 degrees C. and corresponding electrical resistivities equal to or greater than 5.2.times.10.sup.-8 ohm-meters. As before, a chip (or chips) is conventionally mounted on the multilayer ceramic substrate using conventional wire bonding techniques.
One example of a ceramic chip carrier which may utilize either a lead frame or an edge clip for coupling the ceramic substrate's circuitry to an external substrate (e.g., circuit board) is defined in U.S. Pat. No. 5,243,133, issued to the same assignee as the present invention. As described therein, a cap (e.g., metal) serves to cover the positioned chip and protect portions of the circuitry. Remaining portions of the circuitry are protected by encapsulant.
Understandably, electronic packages of the type described hereinabove require effective heat removal in order to operate efficiently, the heat generated by the chip during package operation. Such a requirement becomes more significant when higher powered chips are utilized, as is the industry trend. One well known means of achieving chip heat removal is to use a heat sink, which may be directly coupled (e.g., by thermal adhesive) to the chip. In the case of the aforementioned U.S. Pat. No. 5,243,133, the metal cap may also serve as a heat sink.
In accordance with the teachings of the present invention, there is defined a new semiconductor chip package which includes effective heat removal, while also allowing for added operational capabilities if desired.
It is believed that such a package would constitute a significant advancement in the art.